GET – Processor Instance
Dependence
It represents the properties of a processor attached to aSystem.
These resources are populated by Host Interface, and Extra AMI BIOS Support is needed.
Request
Processor
GET https://{{ip}}/redfish/v1/Systems/{{system_instance}}/Processors/{{system_processor_instance}}
Content-Type: application/json
Sub Processor
https://{{ip}}/redfish/v1/Systems/{{system_instance}}/Processors/{{system_processor_instance}}/
SubProcessors/{{sub_processor_instance}}
Content-Type: application/json
Response
The response of the request will be in JSON format. The properties are mentioned in the following tables.
Name | Type | Read Only | Description | |||||||||||
(OData Attributes) | Refer to OData Support. | |||||||||||||
Oem | Object | OEM Extension (Optional), Refer to Resource Complex Types. | ||||||||||||
Id(M) | String | True | Refer to Resource Type Definitions | |||||||||||
Name(M) | String | True | ||||||||||||
Description | String | True | ||||||||||||
Socket | String | True | Identifies the physical location or socket of the processor. | |||||||||||
Status | Object | True | Name | Type | Read Only | Description | ||||||||
State | String | True | Refer to Resource Complex Types. | |||||||||||
Health | String | True | ||||||||||||
ProcessorType | String | True | Identifies the type of processor contained in this Socket. | |||||||||||
Enum | Description | |||||||||||||
CPU | A Central Processing Unit. | |||||||||||||
GPU | A Graphics Processing Unit. | |||||||||||||
FPGA | A Field Programmable Gate Array. | |||||||||||||
DSP | A Digital Signal Processor. | |||||||||||||
Accelerator | An Accelerator | |||||||||||||
OEM | An OEM-defined Processing Unit. | |||||||||||||
Core | A Core in a Processor. | |||||||||||||
Thread | A Thread in a Processor. | |||||||||||||
ProcessorArchitecture | String | True | Identifies the architecture of the processor contained in this Socket | |||||||||||
Enum | Description | |||||||||||||
x86 | x86 or x86-64 | |||||||||||||
IA-64 | Intel Itanium. | |||||||||||||
ARM | ARM | |||||||||||||
MIPS | MIPS | |||||||||||||
OEM | OEM-defined | |||||||||||||
InstructionSet | String | True | This property shall contain the string which identifies the instruction set of the processor contained in this socket. Note Only supports Northbound. | |||||||||||
Enum | Description | |||||||||||||
x86 | x86 32-bit | |||||||||||||
x86-64 | x86 64-bit | |||||||||||||
IA-64 | Intel IA-64 | |||||||||||||
ARM-A32 | ARM 32-bit | |||||||||||||
ARM-A64 | ARM 64-bit | |||||||||||||
MIPS32 | MIPS 32-bit | |||||||||||||
MIPS64 | MIPS 64-bit | |||||||||||||
OEM | OEM-defined | |||||||||||||
ProcessorId | Object | This object shall contain identification information for this processor. | ||||||||||||
Name | Type | Read only | Description | |||||||||||
VendorId | String | True | This property shall indicate the Vendor Identification string information as provided by the manufacturer of this processor. | |||||||||||
IdentificationRegisters | String | True | The contents of the Identification Registers (CPUID) for this processor. | |||||||||||
EffectiveFamily | String | True | The effective Family for this processor | |||||||||||
EffectiveModel | String | True | This property shall indicate the effective Model information as provided by the manufacturer of this processor. | |||||||||||
Step | String | True | This property shall indicate the Step or revision string information as provided by the manufacturer of this processor. | |||||||||||
MicrocodeInfo | String | True | This property shall indicate the Microcode Information as provided by the manufacturer of this processor. | |||||||||||
Manufacturer | String | True | The manufacturer of the processor | |||||||||||
Model | String | True | This property shall indicate the model information as provided by the manufacturer of this processor. | |||||||||||
MaxSpeedMHz | Number | True | The maximum clock speed of the processor. | |||||||||||
TotalCores | Number | True | The total count of independent processor cores contained within this processor. | |||||||||||
TotalThreads | Number | True | The total count of independent execution threads supported by this processor. | |||||||||||
Links | Object | True | The Links property, as described by the Redfish Specification, shall contain references to resources that are related to, but not contained by (subordinate to), this resource | |||||||||||
Name | Type | Read Only | Description | |||||||||||
Oem | Object | False | Refer to Resource Complex Types. | |||||||||||
ConnectedProcessors | Array | True | An array of links to the processors directly connected to this processor. | |||||||||||
ConnectedProcessors@odata.count | Number | True | The count of Processors directly connected to this processor. | |||||||||||
Chassis(N) | Object | True | The value of this property shall be a reference to a resource of type Chassis that represent the physical container associated with this Processor. | |||||||||||
Actions | Object | True | This object will contain the actions for this resource under Oem property if any. | |||||||||||
SubProcessors | Object | True |
| |||||||||||
Location | Object | True | See Resource.v1_8_1 schema property. Note Northbound is supported and platform specific porting needed. | |||||||||||
AccelerationFunctions(N) | Object | True | A reference to the collection of Acceleration Functions associated with this Processor. | |||||||||||
Assembly | Object | True |
| |||||||||||
MaxTDPWatts | Number | True | The maximum Thermal Design Power (TDP) in watts. | |||||||||||
Metrics(N) | Object | True | A reference to the Metrics associated with this Processor. | |||||||||||
TDPWatts | Number | True | The nominal Thermal Design Power (TDP) in watts. | |||||||||||
TotalEnabledCores | Number | True | The total number of enabled cores contained in this processor. | |||||||||||
UUID | String | True | The universal unique identifier (UUID)for this processor. | |||||||||||
FPGA | Object | True | The properties specific for Processors of type FPGA Refer to FPGA Properties. | |||||||||||
ProcessorMemory | Array | True | The memory directly attached or integrated witin this Processor. | |||||||||||
Name | Type | Read Only | Description | |||||||||||
CapacityMiB | Number | True | The memory capacity in MiB. | |||||||||||
IntegratedMemory | Boolean | True | This indicates whether this memory is integrated within the Processor. | |||||||||||
MemoryType | String | True | The type of memory used by this processor. Refer to Enum values of Memory Type. | |||||||||||
SpeedMHz | Number | True | The operating speed of the memory in MHz. |
Name | Type | Read Only | Description | |||
FirmwareId | String | True | The value of this property shall contain a string describing the FPGA firmware identifier. | |||
FirmwareManufacturer | String | True | The FPGA firmware manufacturer. | |||
FirmwareVersion | String | True | The FPGA firmware version. | |||
FpgaType | String | True | The value of this property shall be a type of the FPG device. | |||
Enum | Description | |||||
Discrete | The discrete FPGA device. | |||||
Integrated | The FPGA device integrated with other processor in the single chip. | |||||
Model | String | True | The value of this property shall be a model of the FPGA device. | |||
PCIeVirtualFunctions | Number | True | The number of the PCIe Virtual Functions. | |||
ProgrammableFromHost | Boolean | True | This flag indicates if the FPGA firmware can b reprogrammed from the host using system software. | |||
ReconfigurationSlots | Array | True | An array of the FPGA reconfiguration slots. reconfiguration slot is used by an FPGA to contain acceleration function that can change as the FPGA being provisioned. | |||
Name | Type | Read Only | Description | |||
AccelerationFunction | Object | True | A link to the Acceleration Function provided by the code programmed into a reconfiguration slot. | |||
ProgrammableFromHost | Boolean | True | This flag indicates if the reconfiguration slot can be reprogrammed from the host using system software. | |||
SlotId | String | True | The FPGA reconfiguration slot identifier. | |||
UUID | String | True | The universal unique identifier (UUID) for this reconfiguration slot. | |||
HostInterface | Object | True | The FPGA interface to the host. Refer to FPGA interface properties. | |||
ExternalInterfaces | Array | True | An array of the FPGA external interfaces. Refer to FPGA interface properties. |
Name | Type | Read Only | Description | ||||
Ethernet | Object | True | Describes the Ethernet related information about this FPGA interface. | ||||
Name | Type | Read Only | Description | ||||
MaxLanes | Number | True | This is the number of lanes supported by this interface. | ||||
MaxSpeedMbps | Number | True | The maximum speed supported by this interface. | ||||
InterfaceType | String | True | The FPGA interface type. | ||||
Enum | Description | ||||||
Ethernet | An Ethernet interface. | ||||||
OEM | An OEM defined interface. | ||||||
PCIe | A PCI Express interface. | ||||||
QPI | The Intel QuickPath Interconnect. | ||||||
UPI | The Intel UltraPath Interconnect. | ||||||
PCIe | Object | True | Describes the PC-Ie related information about this FPGA interface. Refer to PCIe Interface Properties. |
Enum | Description |
DDR | Double data rate synchronous dynamic random-access memory |
DDR2 | Double data rate type two synchronous dynamic random - access memory |
DDR3 | Double data rate type three synchronous dynamic random - access memory |
DDR4 | Double data rate type four synchronous dynamic random - access memory |
DDR5 | Double data rate type five synchronous dynamic random - access memory |
Flash | Flash memory |
GDDR | Synchronous graphics random-access memory |
GDDR2 | Double data rate type two synchronous graphics random - access memory |
GDDR3 | Double data rate type three synchronous graphics random - access memory |
GDDR4 | Double data rate type four synchronous graphics random - access memory |
GDDR5 | Double data rate type five synchronous graphics random - access memory |
GDDR5X | Double data rate type five synchronous graphics random - access memory |
GDDR6 | Double data rate type five e synchronous graphics random - access memory |
HBM1 | High Bandwidth Memory |
HBM2 | The second generation of High Bandwidth Memory |
HBM3 | The third generation of High Bandwidth Memory |
L1Cache | L1 cache |
L2Cache | L2 cache |
L3Cache | L3 cache |
L4Cache | L4 cache |
L5Cache | L5 cache |
L6Cache | L6 cache |
L7Cache | L7 cache |
OEM | OEM-defined |
SDRAM | Synchronous dynamic random-access memory |
SGRAM | Synchronous graphics RAM |
SRAM | Static random-access memory |
Response example
{
"@odata.context": "/redfish/v1/$metadata#Processor.Processor",
"@odata.etag": "\"1619181000\"",
"@odata.id": "/redfish/v1/Systems/Self/Processors/DevType1_CPU1/SubProcessors/DevType1_CPU1_Core3_Thread0",
"@odata.type": "#Processor.v1_5_0.Processor",
"Id": "DevType1_CPU1_Core3_Thread0",
"Links": {
"Chassis": {
"@odata.id": "/redfish/v1/Chassis/Self"
}
},
"MaxSpeedMHz": 3200,
"Name": "DevType1_CPU1_Core3_Thread0",
"ProcessorType": "Thread",
"Status": {
"Health": "OK",
"State": "Enabled"
}
}