Processors

Selectable submenu.

Displays summary of the installed processors.

Selectable option.

When set to Performance, performance is more predictable (deterministic) and operates at the lowest common denominator among the cores. But aggregate peak performance may be reduced. When set to Power, cores can scale frequency independently. Aggregate performance may be higher, but predictability is lower.

Performance is the default setting.

Selectable option.

When set to Enable, cores can go to turbo frequencies.

Enable is the default setting.

Selectable option.

Sets the maximum power consumption for the CPU. Auto sets cTDP=TDP for the installed CPU SKU. Maximum sets the maximum allowed cTDP value for the installed CPU SKU. Usually, maximum is greater than TDP. If a manual value is entered that is larger than the max value allowed, the value will be internally limited to the maximum allowable value. cTDP is only configurable before OS boot.

Auto is the default setting.

Numeric input.

Sets the maximum power consumption for the CPU. Auto sets cTDP=TDP for the installed CPU SKU. Maximum sets the maximum allowed cTDP value for the installed CPU SKU. Usually, maximum is greater than TDP. If a manual value is entered that is larger than the max value allowed, the value will be internally limited to the maximum allowable value. cTDP is only configurable before OS boot.

Selectable option.

Sets the CPU package power limit. Compared to cTDP, PPL can also be changed at runtime and PPL supports a much lower effective limit than cTDP. If Auto is selected, it will be set to the maximum value allowed by the installed CPU. The maximum value allowed for PPL is the cTDP limit.

Auto is the default setting.

Numeric input

If a manual value is entered that is larger than the maximum value allowed, the value will be internally limited to the maximum allowable value. The maximum value allowed for PPL is the cTDP limit.

Selectable option.

Sets the xGMI speed. N is the maximum speed and is auto-calculated from the system board capabilities. For system boards that do not support 4 discrete xGMI speed choices, some menu choices besides Minimumwill result in the xGMI speed getting set to the minimum value.

Minimum is the default setting.

Selectable option.

Global enables/disable for IO based C-state generation and DF C-states.

Enable is the default setting.

Selectable option.

[Maximum Performance] allows the most aggressive use of turbo and power management functions are disabled, thereby increasing power consumption. [Minimal Power] disables turbo and maximizes the use of power management features. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in “Operating Mode” located under “System Setting” submenu.

Auto is the default setting.

Selectable option.

Enables/disable data fabric (DF) C-states. Data fabric C-states may be entered when all cores are in CC6.

Enable is the default setting.

Selectable option.

Enables/disables CPU P1 P-state.

Enable is the default setting.

Selectable option.

Enables/disables CPU P2 P-state.

Enable is the default setting.

Selectable option.

When "No Priority" is selected, there is no preferred IO bus. When a specific bus is selected for higher IO priority, the format of the field is XX, where XX is the bus number in hex.

Numeric input

Preferred IO Bus Number 0x0-0xFF: Bus Number.

Enabling the Enhanced Preferred I/O mode assures an LCLK value for best performance. (Note: Setting 'LCLK Freq Control' on the same Root Complex which the Preferred IO Bus belongs to, to anything other than 'Auto' will override the Enhanced Preferred IO Mode.)

When enabled, each CCX in the system will be declared as a separate NUMA domain. When disabled, memory addressing/NUMA nodes per socket will be declared.

Selectable option.

Enables/disables L1 stream HW prefetcher. Fetches the next cache line into the L1 cache when cached lines are reused within a certain time period or accessed sequentially.

Selectable option.

Enables/disable L2 stream HW prefetcher. Fetches the next cache line into the L2 cache when cached lines are reused within a certain time period or accessed sequentially.

Selectable option.

Enables/Disables L1 stride prefetcher. Uses memory access history to fetch additional data lines into L1 cache when each access is a constant distance from the previous. Some workloads may benefit from having it disabled.

Selectable option.

Enables/Disables L1 region prefetcher. Fetches additional data lines into L1 cache when the data access for a given instruction tends to be followed by a consistent pattern of subsequent accesses. Some workloads may benefit from having it disabled.

Selectable option.

Enables/Disables L2 Up/Down prefetcher. Uses memory access history to determine whether to fetch the next or previous line for all memory accesses. Some workloads may benefit from having it disabled.

Selectable option.

Can be used to disable symmetric multithreading. To re-enable SMT, a power cycle is needed after selecting Enable.

Selectable option.

CPPC(cooperative processor performance control) is a way for the OS to influence the performance of a CPU on a contiguous and abstract scale without knowledge of power budgets or discrete processor frequencies.

Selectable option.

Maximum boost frequency. Auto set the boost frequency to the fused value for the installed CPU. When a manual value is entered, the value entered is a 4 digit number representing the maximum boost frequency in MHZ. The value entered applies to all cores.

Numeric input

Maximum boost frequency. Auto set the boost frequency to the fused value for the installed CPU. When a manual value is entered, the value entered is a 4 digit number representing the maximum boost frequency in MHZ. The value entered applies to all cores.

Selectable option.

Enable/disable CPU Virtualization

Selectable option.

Sets the xGMI width. Auto sets maximum width based on the system capabilities.

Selectable option.

• APIC Mode. xAPIC scales to only 255 hardware threads.

• x2APIC scales beyond 255 hardware threads but is not supported by some legacy OS versions.

• Auto uses x2APIC only if 256 hardware threads are in the system. Otherwise xAPIC is used.

• Auto: Use hardware default value.

• Enable: Enable HSMP interface support.

• Disable: Disable HSMP interface support.

(ERMSB) Can be disabled for analysis purposes as long as OS supports it.

DLWM saves power during periods of low socket-to-socket data traffic by reducing the number active xGMI lanes per link from 16,8,2. Disabling this parameter can achieve a fixed xGMI link width.

3D V-Cache only takes effect in systems powered by AMD EPYC 7003 Series Processors equipped with AMD 3D V-Cache technology. Setting this option to <Enable> can leverage the extra L3 cache.

Select the total number of enabled CPU cores per socket to be activated. Options available are dependent on CPU SKU topology. performance.