Independent memory mode installation order
In independent memory mode, memory channels can be populated with DIMMs in any order and you can populate all channels for each processor in any order with no matching requirements. Independent memory mode provides the highest level of memory performance, but lacks failover protection. The DIMM installation order for independent memory mode varies based on the number of processors and memory modules installed in the server.
Individual memory channels can run at different DIMM timings, but all channels must run at the same interface frequency.
Populate memory channel 0 first.
In each memory channel, populate slot 0 first.
Memory channel 1 is empty or identically populated as memory channel 0.
Memory channel 2 is empty or identically populated as memory channel 1.
If a memory channel has two DIMMs, populate the DIMM with a higher number of ranks in slot 0.
With one processor
The following table shows the DIMM population sequence for independent memory mode when one processor is installed.
Total | Processor 1 | ||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DIMMs | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | |
1 | 14 | ||||||||||||||||
2 (S) | 14 | 10 | |||||||||||||||
2 (D) | 14 | 12 | |||||||||||||||
4 (S)† | 14 | 10 | 7 | 3 | |||||||||||||
4 (D)* | 14 | 12 | 5 | 3 | |||||||||||||
6 (S) | 16 | 14 | 10 | 7 | 3 | 1 | |||||||||||
8†‡ | 16 | 14 | 12 | 10 | 7 | 5 | 3 | 1 | |||||||||
12 (S) | 16 | 15 | 14 | 13 | 10 | 9 | 8 | 7 | 4 | 3 | 2 | 1 | |||||
12 (D)*†‡ | 16 | 14 | 13 | 12 | 10 | 9 | 8 | 7 | 5 | 4 | 3 | 1 | |||||
16†‡ | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | |
Note * Each of the following DIMM slot groups should be populated with DIMMS of the same capacity:
† Sub NUMA Clustering (SNC2) feature can only be enabled when DIMMs are populated in this specified sequence. The SNC2 feature can be enabled via UEFI. ‡DIMM configurations that support Software Guard Extensions (SGX), see Enable Software Guard Extensions (SGX) to enable this feature. |
With two processors
The following tables show the DIMM population sequence for independent memory mode when two processors are installed.
Total | Processor 1 | ||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DIMMs | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | |
2 | 14 | ||||||||||||||||
4 (S) | 14 | 10 | |||||||||||||||
4 (D) | 14 | 12 | |||||||||||||||
8 (S)† | 14 | 10 | 7 | 3 | |||||||||||||
8 (D)* | 14 | 12 | 5 | 3 | |||||||||||||
12 (S) | 16 | 14 | 10 | 7 | 3 | 1 | |||||||||||
16†‡ | 16 | 14 | 12 | 10 | 7 | 5 | 3 | 1 | |||||||||
24 (S) | 16 | 15 | 14 | 13 | 10 | 9 | 8 | 7 | 4 | 3 | 2 | 1 | |||||
24 (D)*†‡ | 16 | 14 | 13 | 12 | 10 | 9 | 8 | 7 | 5 | 4 | 3 | 1 | |||||
32†‡ | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | |
Total | Processor 2 | ||||||||||||||||
DIMMs | 32 | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | |
2 | 30 | ||||||||||||||||
4 (S) | 30 | 26 | |||||||||||||||
4 (D) | 30 | 28 | |||||||||||||||
8(S)† | 30 | 26 | 23 | 19 | |||||||||||||
8(D)* | 30 | 28 | 21 | 19 | |||||||||||||
12 (S) | 32 | 30 | 26 | 23 | 19 | 17 | |||||||||||
16†‡ | 32 | 30 | 28 | 26 | 23 | 21 | 19 | 17 | |||||||||
24 (S) | 32 | 31 | 30 | 29 | 26 | 25 | 24 | 23 | 20 | 19 | 18 | 17 | |||||
24 (D)*†‡ | 32 | 30 | 29 | 28 | 26 | 25 | 24 | 23 | 21 | 20 | 19 | 17 | |||||
32†‡ | 32 | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | |
Note * Each of the following DIMM slot groups should be populated with DIMMS of the same capacity:
† Sub NUMA Clustering (SNC2) feature can only be enabled when DIMMs are populated in this specified sequence. The SNC2 feature can be enabled via UEFI. ‡DIMM configurations that support Software Guard Extensions (SGX), see Enable Software Guard Extensions (SGX) to enable this feature. |