Installation order: memory sparing with four processors
Memory module installation order for memory sparing with four processors installed in the server.
The following tables show the DIMM population sequence for memory sparing when four processors are installed.
Processors 1 and 2 are installed on the system board.
Processors 3 and 4 are installed in the processor and memory expansion tray.
When adding one or more DIMMs during a memory upgrade, you might need to remove some DIMMs that are already installed to new locations.
An even number of DIMMs is required for memory sparing.
This mode only applies to single-rank memory modules. When installing DIMMs consisting of more than two ranks, including dual-rank, quad-rank or octal-rank memory modules, refer to Independent memory mode instead.
Total | Processor 1 | Processor 2 | Total | |||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DIMMs | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | DIMMs | |||
8 | 7 | 8 | 19 | 20 | 8 | |||||||||||||||||||||||
10 | 5 | 6 | 7 | 8 | 19 | 20 | 10 | |||||||||||||||||||||
12 | 5 | 6 | 7 | 8 | 17 | 18 | 19 | 20 | 12 | |||||||||||||||||||
14 | 5 | 6 | 7 | 8 | 17 | 18 | 19 | 20 | 14 | |||||||||||||||||||
16 | 5 | 6 | 7 | 8 | 17 | 18 | 19 | 20 | 16 | |||||||||||||||||||
18 | 5 | 6 | 7 | 8 | 9 | 10 | 17 | 18 | 19 | 20 | 18 | |||||||||||||||||
20 | 5 | 6 | 7 | 8 | 9 | 10 | 17 | 18 | 19 | 20 | 21 | 22 | 20 | |||||||||||||||
22 | 5 | 6 | 7 | 8 | 9 | 10 | 17 | 18 | 19 | 20 | 21 | 22 | 22 | |||||||||||||||
24 | 5 | 6 | 7 | 8 | 9 | 10 | 17 | 18 | 19 | 20 | 21 | 22 | 24 | |||||||||||||||
26 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 17 | 18 | 19 | 20 | 21 | 22 | 26 | |||||||||||||
28 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 28 | |||||||||||
30 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 30 | |||||||||||
32 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 32 | |||||||||||
34 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 34 | |||||||||
36 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 36 | |||||||
38 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 38 | |||||||
40 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 40 | |||||||
42 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 42 | |||||
44 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 44 | |||
46 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 46 | |||
48 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 48 |
Related DIMM population sequences for four processor systems:
To continue populating processor 3 and 4 DIMMs, see Memory sparing with four processors (processor 3 and 4).
Total | Processor 3 | Processor 4 | Total | |||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DIMMs | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | DIMMs | |||
8 | 31 | 32 | 43 | 44 | 8 | |||||||||||||||||||||||
10 | 31 | 32 | 43 | 44 | 10 | |||||||||||||||||||||||
12 | 31 | 32 | 43 | 44 | 12 | |||||||||||||||||||||||
14 | 29 | 30 | 31 | 32 | 43 | 44 | 14 | |||||||||||||||||||||
16 | 29 | 30 | 31 | 32 | 41 | 42 | 43 | 44 | 16 | |||||||||||||||||||
18 | 29 | 30 | 31 | 32 | 41 | 42 | 43 | 44 | 18 | |||||||||||||||||||
20 | 29 | 30 | 31 | 32 | 41 | 42 | 43 | 44 | 20 | |||||||||||||||||||
22 | 29 | 30 | 31 | 32 | 33 | 34 | 41 | 42 | 43 | 44 | 22 | |||||||||||||||||
24 | 29 | 30 | 31 | 32 | 33 | 34 | 41 | 42 | 43 | 44 | 45 | 46 | 24 | |||||||||||||||
26 | 29 | 30 | 31 | 32 | 33 | 34 | 41 | 42 | 43 | 44 | 45 | 46 | 26 | |||||||||||||||
28 | 29 | 30 | 31 | 32 | 33 | 34 | 41 | 42 | 43 | 44 | 45 | 46 | 28 | |||||||||||||||
30 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 41 | 42 | 43 | 44 | 45 | 46 | 30 | |||||||||||||
32 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 32 | |||||||||||
34 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 34 | |||||||||||
36 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 36 | |||||||||||
38 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 38 | |||||||||
40 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 40 | |||||||
42 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 42 | |||||||
44 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 44 | |||||||
46 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 46 | |||||
48 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 48 |
Related DIMM population sequences for four processor systems:
To continue populating processor 1 and 2 DIMMs, see Memory sparing with four processors (processors 1 and 2).