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Independent memory mode installation order

In independent memory mode, memory channels can be populated with DIMMs in any order and you can populate all channels for each processor in any order with no matching requirements. Independent memory mode provides the highest level of memory performance, but lacks failover protection. The DIMM installation order for independent memory mode varies based on the number of processors and memory modules installed in the server.

Independent memory mode guidelines:
  • Individual memory channels can run at different DIMM timings, but all channels must run at the same interface frequency.

  • Populate memory channel 0 first.

  • In each memory channel, populate slot 0 first.

  • Memory channel 1 is empty or identically populated as memory channel 0.

  • Memory channel 2 is empty or identically populated as memory channel 1.

  • If a memory channel has two DIMMs, populate the DIMM with a higher number of ranks in slot 0.

  • Mixing DIMMs with different capacity is not allowed. All DIMMs installed must be identical.

Independent mode population sequence

SD650-I V3 supports fully populated processors only (two processors per node).

Note
48 GB and 96 GB are supported by 5th Gen Intel® Xeon® Scalable processors (Emerald Rapids, EMR) MCC and XCC processors.
Table 1. Independent mode memory population sequence
Processor 1Processor 2
iMCiMC1iMC0iMC2iMC3iMC3iMC2iMC0iMC1
Memory channel1010010110100101
DIMM slot number12345678910111213141516
16 DIMMSDIMMDIMMDIMMDIMMDIMMDIMMDIMMDIMMDIMMDIMMDIMMDIMMDIMMDIMMDIMMDIMM
Note