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GPU processor mapping and adapter population rules (3-slot PCIe expansion cage)

Use the information in this topic to understand adapter-to-processor mapping and the GPU adapter population order for adapters in the 3-slot PCIe expansion cage.

Note
PCIe expansion cage 1 and PCIe expansion cage 2 must be the same type, either 4-slot PCIe expansion cages or 3-slot PCIe expansion cages
The following figure illustrates the numbering for the PCIe slots in the server (when 3-slot PCIe expansion cages are installed).
Note
Only double-width full-height, full-length (FHFL) GPUs are supported in the 3-slot PCIe expansion cage.
Figure 1. Numbering of the PCIe slots on the server
Front view of the server with PCIe slots numbered
The following table shows how the PCIe adapter slots are mapped to the system processors.
Table 1. PCIe adapter-to-processor mapping
Adapter slotDescriptionProcessor mapping
I/O expansion cage
Slot 1PCIe 3.0 x16 (full-height, half-length). Typically, a network adapter is installed in this slot.1
Slot 2PCIe 3.0 x16 (full-height, half-length). Typically, a RAID adapter or a network adapter is installed in this slot.2
Slot 3PCIe 3.0 x4 (full-height, half-length). Typically, a 1GbE network adapter is installed in this slot.Onboard chipset, also known as the Platform Controller Hub (PCH)
3-slot PCIe expansion cage 1
Slot 4PCIe 3.0 x16 for a GPU (full-height, full-length, double-width)1
Slot 5PCIe 3.0 x16 for a GPU (full-height, full-length, double-width)1
3-slot PCIe expansion cage 2
Slot 6PCIe 3.0 x16 for a GPU (full-height, full-length, double-width)2
Slot 7PCIe 3.0 x16 for a GPU (full-height, full-length, double-width)2
System board
Slot 8 (internal)M.2Onboard chipset, also known as the Platform Controller Hub (PCH)
The following table defines the population order for the GPU adapters in the PCIe expansion cages 1 and 2.
Table 2. GPU adapter population order. The GPU adapter population order varies depending on adapter-to-processor utilization goals:

  • Concentrated utilization. Adapters are connected to the PCIe busses from CPU1 until all PCIe busses on CPU1 is consumed before populating adapters against the CPU2 PCI Express busses.

  • Distributed utilization. Adapters are populated as equally as possible between the CPU1 and CPU2 PCIe Express busses

Number of PCIe adaptersConcentratedDistributed
1 GPU adapterSlot 4Slot 4
2 GPU adaptersSlot 4, slot 5Slot 4, slot 6
3 GPU adaptersSlot 4, slot 5, slot 6Slot 4, slot 5, slot 6
4 GPU adaptersSlot 4, slot 5, slot 6, slot 7Slot 4, slot 5, slot 6, slot 7