Memory mirroring mode installation order
Memory-mirroring mode provides full memory redundancy while reducing the total system memory capacity in half. Memory channels are grouped in pairs with each channel receiving the same data. If a failure occurs, the memory controller switches from the DIMMs on the primary channel to the DIMMs on the backup channel. The DIMM installation order for memory mirroring varies based on the number of processors and DIMMs installed in the server.
Memory mirroring reduces the maximum available memory by half of the installed memory. For example, if the server has 64 GB of installed memory, only 32 GB of addressable memory is available when memory mirroring is enabled.
Each DIMM must be identical in size and architecture.
DIMMs on each memory channel must be of equal density.
If two memory channels have DIMMs, mirroring occurs across two DIMMs (channels 0/1 will both contain the primary/secondary memory caches).
If three memory channels have DIMMs, mirroring occurs across all three DIMMs (channels 0/1, channels 1/2, and channels 2/0 will all contain primary/secondary memory caches).
With two processors
The following table shows the DIMM population sequence for memory mirroring when two processors are installed.
Total | Processor 1 | Processor 2 | Total | |||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DIMMs | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | DIMMs | |||
8* | 3 | 5 | 8 | 10 | 15 | 17 | 20 | 22 | 8 | |||||||||||||||||||
12* | 1 | 3 | 5 | 8 | 10 | 12 | 13 | 15 | 17 | 20 | 22 | 24 | 12 | |||||||||||||||
24* | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 24 |
With four processors
The following table shows the DIMM population sequence for memory mirroring mode when four processors are installed.
Total | Processor 1 | Processor 2 | Total | |||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
DIMMs | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | DIMMs | |||
16* | 3 | 5 | 8 | 10 | 15 | 17 | 20 | 22 | 16 | |||||||||||||||||||
24* | 1 | 3 | 5 | 8 | 10 | 12 | 13 | 15 | 17 | 20 | 22 | 24 | 24 | |||||||||||||||
48* | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 48 | |||
Total | Processor 3 | Processor 4 | Total | |||||||||||||||||||||||||
DIMMs | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | DIMMs | |||
16* | 27 | 29 | 32 | 34 | 39 | 41 | 44 | 46 | 16 | |||||||||||||||||||
24* | 25 | 27 | 29 | 32 | 34 | 46 | 37 | 39 | 41 | 44 | 46 | 48 | 24 | |||||||||||||||
48* | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 10 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 48 |