Memory

Provides status of System Memory.

The option number of the memory speed is changed dynamically according to the combination of the installed CPU SKU, DIMM type, number of DIMMs per channel, and system motherboard support.

The system operates at the rated speed of the slowest DIMM in the system when populated with different speed DIMMs.

If DIMMs are installed with a rated speed below 3600, this will result in the memory speed getting set to the Minimum value.

Enables/disables low-power features for DIMMs.

Specify the number of desired NUMA nodes per CPU socket (for example, NPS1 means 1 NUMA per socket).

NPS0 will attempt to interleave the two CPU sockets together into one NUMA node.

This setting may degrade performance due to increased memory latency.

This setting specifies if the system should use a DRAM rank also known as chipselect interleaving.

This feature will spread memory accesses across the banks of memory within a channel and will increase memory block access performance.

This setting requires that the populated DIMMs have the same bank size, type, and that the number of banks is a power of two.

It is strongly recommended that DIMMs with the same part number be populated.

Enable or disable DRAM Post Package Repair.

[Disabled]: Disable memory self-healing feature.

[PMU Mem BIST]: Use vendor-provided physical layer management unit firmware (PMU) to test memory on all channels simultaneously. Failing memory will be repaired using soft (temporary) or hard (permanent) repair, depending on the post package repair (PPR) configuration.

[Self-Healing Mem BIST]: Use JEDEC DRAM built-in self-test (BIST) to detect failure and attempt a hard repair (permanent) for the failing memory row.

[PMU and Self-Healing Mem BIST]: Run PMU Mem BIST and then Self-Healing Mem BIST tests sequentially.

Sets the period of time between successive DRAM scrub events.

Enable or disable memory interleaving.

Note that the NUMA nodes per socket value will be honored regardless of this setting.

Specify the stored refresh limit to required enter sub-urgent refresh mode.

Constraint: SubUrgRefLowerBound <= UrgRefLimit

Valid value: 6 ~ 1.

Specify the stored refresh limit to required enter urgent refresh mode.

Constraint: SubUrgRefLowerBound <= UrgRefLimit.

Valid value: 6 ~ 1.

A refresh rate of 1x is recommended for better performance.

Choose refresh rate 2x to mitigate rowhammer issue, this may have a performance side effect.

SME-MK encryption mode.

Enabling both SMEE and SME-MK is not supported.

SEV VMs using ASIDs below the SEV-ES ASID Space Limit must enable the SEV-ES feature.

ASIDs from SEV-ES ASID Space Limit to (SEV ASID Count + 1) can only be used with SEV VMs.

If this field is set to (SEV ASID Count + 1), all ASIDs are forced to be SEV-ES ASIDs. Hence, the valid values for this field is 1 - (SEV ASID Count + 1).

Can be used to disable SEV. To re-enable SEV, a POWER CYCLE is needed after selecting the Enabled option.

Control secure memory encryption enable.