Processors
This menu offers options to change the processor settings.
Item | Options | Description |
---|---|---|
Processor Details | N/A | Displays summary of the installed processors. |
Turbo Mode |
| [Enabled] improves the overall processor performance when all processor cores are not being fully utilized. A processor core can run above its rated frequency for a short period of time when it is in turbo mode. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. To change the settings, choose System Settings > Operating Modes > Choose Operating Mode > Custom Mode. |
CPU P-state Control |
| You can select to controls CPU P-states (performance states). [None]: Disables all P-states and processors work either at rated frequency or in Turbo Mode (if Turbo Mode is enabled). [Legacy]: CPU P-states will be presented to the OS. The OS power management (OSPM) controls which P-state is selected. [Autonomous]: The P-states are fully controlled by system hardware. No P-state support is required in the OS or VM. [Cooperative] is a combination of [Legacy] and [Autonomous]. The P-states are still controlled by hardware but the OS can provide hints to the hardware for P-state limits, indicating the desired setting. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. To change the settings, choose System Settings > Operating Modes > Choose Operating Mode > Custom Mode. |
C-States |
| C-states reduces power consumption during the idle time. [Legacy]: The operating system initiates the C-state transitions. For E5/E7 processors, ACPI C1/C2/C3 map to Intel C1/C3/C6. For 6500/7500 processors, ACPI C1/C3 map to Intel C1/C3 (ACPI C2 is not available). Some OS may defeat the ACPI mapping (e.g., Intel idle driver). When a preset mode is selected, the low-level settings are not changeable and will be grayed out. To change the settings, choose System Settings > Operating Modes > Choose Operating Mode > Custom Mode. |
C1 Enhanced Mode |
| [Enabled]: Saves power by halting processor cores that are idle. Using this feature requires an operating system supporting C1E state. Changes take effect after the system rebooted. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. To change the settings, choose System Settings > Operating Modes > Choose Operating Mode > Custom Mode > C-States > [Legacy]/[Disabled] . Note C1E status is changeable only when C-states is not set to [Autonomous]. |
Hyper-Threading |
| Enables or disables logical processor cores on processors Note Changing this setting requires a Power Good reset to take effect. |
Execute Disable Bit |
| Allows memory to be marked as executable or non-executable when used with a supporting operating system. Note This function is only applicable for SR250 V3, ST50 V3 and ST250 V3. |
DSA |
| Enables or disables DSA (Data Streaming Accelerator). |
Trusted Execution Technology |
| Enables or disables Intel® Trusted Execution Technology (Intel® TXT). |
Intel Virtualization Technology |
| Enables or disables Intel® Virtualization Technology. |
Hardware Prefetcher |
| Lightly-threaded applications and some benchmarks can take advantage of this feature when it is enabled. |
Adjacent Cache Prefetch |
| Lightly-threaded applications and some benchmarks can take advantage of this feature when it is enabled. |
DCU Streamer Prefetcher |
| Lightly-threaded applications and some benchmarks can take advantage of this feature when it is enabled. |
DCU IP Prefetcher |
| It is recommended that the Data Cache Unit (DCU) IP Prefetcher is set to [Enabled] for the most environments. However, some environments may benefit from having it set to [Disabled], e.g. Java. |
DCA |
| When [Enabled] is selected, the Direct Cache Access (DCA) allows the capable I/O devices, such as a network controller, to place data directly into the processor cache, improving application response times. |
Energy Efficient Turbo |
| [Enabled]: The optimal turbo frequency of processors can be adjusted dynamically based on processor utilization. This feature is also influenced by Power/Performance Bias. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. To change the settings, choose System Settings > Operating Modes > Choose Operating Mode > Custom Mode > Turbo Mode > [Enabled] |
Uncore Frequency Scaling |
| When [Enabled] is selected, the processor uncore (all miscellaneous logic inside the processor package) dynamically changes the speed based on the workload. |
MONITOR/MWAIT |
| MONITOR/MWAIT instructions are used to engage C-states. Some operating systems re-enable C-states even when they are disabled in setup. To prevent this, do the following:
|
UPI Link Disable |
| Limiting the QPI/UPI connections to the minimum number can save power. If maximum performance is desired, all QPI links should be left enabled. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. To change the settings, choose System Settings > Operating Modes > Choose Operating Mode > Custom Mode. Note UPI is available only when two or more processors are installed. |
SNC |
| SNC (Sub NUMA cluster) partitions the cores and last-level cache into clusters with each cluster bound to a set of memory controllers in the system, dividing each CPU package into 2 or 4 NUMA nodes (High Bandwidth Memory processor only supports 4 NUMA nodes). This feature improves average latency to the last-level cache. Note
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UMA-Based Clustering |
For MCC SKU:
| Options include:
Note
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Snoop Preference |
| You can select the appropriate snoop mode based on the workload. Setting the snoop mode preference does not always guarantee that it will be selected. The mode will be changed if the current hardware configuration does not support the desired mode |
XPT Prefetcher |
| XPT prefetch is used to enable a read request that is sent to the last level cache to speculatively issue a copy of that read to the memory controller prefetching. |
UPI Prefetcher |
| UPI prefetch is used to enable an early memory read on a DDR bus. The UPI receive path spawns a memory read to the memory controller prefetcher. Note UPI is available only when two or more processors are installed. |
Total Memory Encryption |
| Enables or disables Total Memory Encryption (TME). |
Total Memory Encryption Bypass |
| Enables or disables Total Memory Encryption (TME). Note This feature appears only when Total Memory Encryption is set to [Enabled]. |
Memory Integrity |
| Enables or disables memory integrity globally. This knob has no action when TDX is enabled in SPR. Note This feature appears only when Total Memory Encryption is set to [Enabled] |
Multikey Total Memory Encryption |
| Enables or disables Multikey Total Memory Encryption (MK-TME). Note This feature appears only when Total Memory Encryption is set to [Enabled]. |
Max MKTME Keys | N/A | Displays Max MKTME (Multi-Key Total Memory Encryption) Keys. |
Trust Domain Extension |
| Enable/Disable Trust Domain Extension (TDX). |
TDX Secure Arbitration Mode Loader |
| Enable/Disable TDX Secure Arbitration Mode Loader (SEAM Loader). Note This feature applies only to SR630 V3 and SR650 V3. |
Disable excluding Mem below 1MB in CMR |
| Enable/Disable TDX Excluding CMR below 1MB. Note This feature is available only when TDX or MKTME is enabled. |
TME-MT/TDX key split |
| Designate number of bits for TDX usage. The rest will be used by TME-MT. Note
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TME-MT keys: | N/A | Number of keys designated for TME-MT usage. Note This feature applies only to SR630 V3 and SR650 V3. |
TDX keys: | N/A | Number of keys designated for TDX usage. Note This feature applies only to SR630 V3 and SR650 V3. |
SW Guard Extensions |
| Enables or disables Software Guard Extensions (SGX). Note This feature appears only when the system supports TME. In addition, before enabling this option, do the following:
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SGX Factory Reset |
| Enables or disables SGX Factory Reset. When [Enabled] is selected, it erases all registration data on subsequent boot, and additionally forces an Initial Platform Establishment flow when SGX is enabled. Note This feature appears only when the system supports TME. In addition, before enabling this option, do the following:
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SGX Package Info In-Band Access |
| Enables or disables Software Guard Extensions (SGX) Package Info In-Band Access. Note This feature appears only when the system supports TME. In addition, before enabling this option, do the following:
|
SGX PRM Size |
| SGX PRM Size is a constituent which may not be equal to the total PRM size. Note This feature will be grayed out if SW Guard Extensions is set to [Disabled]. |
Intel Speed Select |
| If a CPU is installed that doesn't support SST, the Base option will be used regardless of the setting selected. Bases: Effectively disabled SST. Auto: The level of SST enablement is controlled automatically based on the number of CPU cores enabled in UEFI. Config1/Config2: Force the SST cores limits based on the config option selected. Note
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LLC Prefetch |
| LLC prefetcher is an additional prefetch mechanism on top of the existing prefetchers that prefetch data into the core DCU and the MLC. Enabling LLC prefetch gives the core prefetcher the ability to prefetch data directly into the LLC without necessarily filling into the MLC. |
L2 RFO Prefetcher |
| One of the four variables (IRQThreshold, StaleAtoS, CRQoSConfiguration, and L2RFOPrefetch) is used to optimize SAP HANA performance with 2-hop memory, such as 4-socket ring, 6-socket and 8-socket configurations. [Auto] makes the L2 prefethcer less aggressive and lowers the NT write bandwidth. [Disabled] limits burstiness and reduce snooping. |
PECI Is Trusted |
| Enables or disables trust for the PECI (Platform Environment Control Interface) of the system. Select [Disabled] if a higher level of security is required. When [Disabled] is selected, some functions such as memory and I/O utilization reporting may not work. |
P-State Hysteresis |
| Controls the minimum dwell time before a P-State change occurs. Selecting a greater value results in effective operations Selecting a smaller value results in better performance. |
CPU PCIe Relaxed Ordering |
| Enabling the CPU PCIe Relaxed ordering always allows the downstream completions to pass posted writes. |
PCH PCIe Relaxed Ordering |
| Enabling the PCH PCIe Relaxed Ordering always allows the downstream completions to pass posted writes. |
Cores in CPU Package |
| Selects number of cores enabled within each CPU package. The number "n" is the maximum core count supported by the installed processor. |
UPI Link Frequency |
| Selects the desired UPI link frequency. [Maximum performance] maximizes the performance. [Balanced] offers a balance between performance and power. [Minimal power] maximizes power savings. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. To change the settings, choose System Settings > Operating Modes > Choose Operating Mode > Custom Mode. Note UPI is available only when two or more processors are installed. |
CPU Frequency Limits |
| The maximum frequency (turbo, AVX, and non turbo) can be restricted to a frequency that is between the maximum turbo frequency for the installed processor and 1.2GHz. The max frequency for N+1 cores can not be higher than N cores. If an unsupported frequency is entered, it will automatically be limited to a supported value. If the CPU Frequency Limits are being controlled through application software, leave this feature at the default [Full turbo uplift] and change the settings by choosing System Settings > Operating Modes > Choose Operating Mode > Custom Mode > Turbo Mode > Enabled. Note This feature appears only when Turbo Mode is enabled. |
Rocket Mode |
| When [Enabled] is selected, Rocket Mode allows the cores to jump to max turbo instantly rather than on a smooth curve. When Rocket Mode is enabled, it is only engaged when P-states are set to [Autonomous]. |
C0 Nap Time | 0 | Controls the maximum nap time in C0 sub-state and control whether C0.2 is supported or not. |
C-State Interrupt Response Time | 0 | Controls the relative interrupt response time in C-States. Al value 0x0000 means that the setting is not used. |
UPI Power Management | N/A | Sets the desired power management level for the UPI interface. L1 saves the most power but has longer latency compared to L0p or [Disabled]. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. To change the settings, choose System Settings > Operating Modes > Choose Operating Mode > Custom Mode. Note UPI is available only when two or more processors are installed. |
CPU Frequency Limits | N/A | The maximum frequency (turbo, AVX, and non turbo) can be restricted to a frequency that is between the maximum turbo frequency for the installed processor and 1.2GHz. The max frequency for N+1 cores can not be higher than N cores. If an unsupported frequency is entered, it will automatically be limited to a supported value. If the CPU Frequency Limits are being controlled through application software, leave this feature at the default [Full turbo uplift] and change the settings by choosing System Settings > Operating Modes > Choose Operating Mode > Custom Mode > Turbo Mode > Enabled. Note This sub-menu item appears only when CPU Frequency Limits is set to [Restrict maximum frequency]. |
Limit CPU PA to 46 bits |
| Limits CPU physical address to 46 bits to support older Hyper-V. |
Misc |
| Option to get enhanced CPU performance. Select Option3 for best performance. Select Option2 or Option1 if encounter any thermal related event. |