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DCPMM Installation order: Memory mode with two processors

When implementing Memory mode, any supported DIMMs in any capacity can be installed.

When two processors are installed in the server:

  • Processors 1 and 2 are installed in the lower system board of the lower compute tray.

Several configurations are supported with implementing Memory mode with two processors:

  • 6 DCPMMs/6 DRAM DIMMs per processor

  • 4 DCPMMs/6 DRAM DIMMs per processor

  • 2 DCPMMs/6 DRAM DIMMs per processor

  • 2 DCPMMs/4 DRAM DIMMs per processor

6 DCPMMs/ 6 DRAM DIMMs per processor​

Table 1. Memory mode with 6 DCPMMs and 6 DRAM DIMMs per processor (2 processors).
In the table below:

  • P = DCPMM

  • D = DRAM DIMM

Processor 1Processor 2
123456 789101112131415161718 192021222324
DPDPDP PDPDPDDPDPDP PDPDPD

4 DCPMMs/ 6 DRAM DIMMs per processor​

Table 2. Memory mode with 4 DCPMMs and 6 DRAM DIMMs per processor (2 processors).
In the table below:

  • P = DCPMM

  • D = DRAM DIMM

Processor 1Processor 2
123456 789101112131415161718 192021222324
D DPDP PDPD DD DPDP PDPD D

2 DCPMMs/ 8 DRAM DIMMs per processor​

Table 3. Memory mode with 2 DCPMMs and 8 DRAM DIMMs per processor (2 processors).
In the table below:

  • P = DCPMM

  • D = DRAM DIMM

Processor 1Processor 2
123456 789101112131415161718 192021222324
P DDDD DDDD PP DDDD DDDD P

2 DCPMMs/ 6 DRAM DIMMs per processor​

Table 4. Memory mode with 2 DCPMMs and 6 DRAM DIMMs per processor (2 processors).
In the table below:

  • P = DCPMM

  • D = DRAM DIMM

Note
In this configuration, only RDIMMs are recommended for the DRAM DIMMs.
Processor 1Processor 2
123456 789101112131415161718 192021222324
D D DP PD D DD D DP PD D D

2 DCPMMs/ 4 DRAM DIMMs per processor​

Table 5. App Direct mode with 2 DCPMMs and 4 DRAM DIMMs per processor (2 processors).
In the table below:

  • P = DCPMM

  • D = DRAM DIMM

Processor 1Processor 2
123456 789101112131415161718 192021222324
P D D   D D PP D D   D D P