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CXL Memory Module

ItemOptionsFunction description
Memory Mode

1LM + Vol

Heterogeneous Interleave

[1LM + Vol]: DRAM and CMM are visible to software as two separate NUMA nodes.

[Heterogeneous Interleave]: DRAM and CMM are visible to software as one NUMA node, and they are interleaved.

Note:

Enabling memory mode has dependencies on both hardware configuration and firmware configuration. If UEFI finds that any of the dependencies are not met, it will fall back to 1LM + Vol mode. Refer to the product manual for detailed configuration methods.

Note
To enable [Heterogeneous Interleave] mode, the following requirements must be satisfied, otherwise UEFI will automatically configure the system to 1LM + Vol mode (setting unchanged):

  1. System Settings -> Processors -> SNC = <Disabled>

  2. System Settings -> Processors -> UPI affinity = <Disabled>

  3. System Settings -> Memory -> Socket Interleave = <NUMA>

  4. System Settings -> Memory -> Mirror Configuration -> Full Mirror = <Disabled> and System Settings -> Memory -> Mirror Configuration -> Partial Mirror = <Disabled>

  5. Ensure that the configuration of DIMMs and CXL memory devices complies with the User Guide requirements.

MEFN Support

  • Disabled

  • Firmware First

  • OS First

Memory Error Firmware Notification (MEFN) mechanism is to report CMM memory errors.

  • [Disabled]: Disable CMM error event notification.

  • [Firmware First]: Enable firmware to handle CMM error.

  • [OS First]: Enable OS to handle CMM error.

Bay XX: CMM YY-ZZ-MM 

CMM information and status.

...  
Bay XX: CMM YY-ZZ-MM 

CMM information and status.

Note

XX, YY, ZZ and MM are device slot ID, bus, device and function number related to specified platform.