System-board internal connectors

The following illustration shows the internal connectors on the system board.

Figure 1. Internal connectors on the system board

Following is the mapping table of DIMM connectors and TMM memory events.

Mapping table of DIMM connectors and TMM memory events

DIMM Location	Memory info of TMM Events
Microprocessor 1, DIMM A1	CPU0, CHANNEL0, DIMM0
Microprocessor 1, DIMM A2	CPU0, CHANNEL0, DIMM1
Microprocessor 1, DIMM B1	CPU0, CHANNEL1, DIMM0
Microprocessor 1, DIMM B2	CPU0, CHANNEL1, DIMM1
Microprocessor 1, DIMM C1	CPU0, CHANNEL2, DIMM0
Microprocessor 1, DIMM C2	CPU0, CHANNEL2, DIMM1
Microprocessor 1, DIMM D1	CPU0, CHANNEL3, DIMM0
Microprocessor 1, DIMM D2	CPU0, CHANNEL3, DIMM1
Microprocessor 2, DIMM E1	CPU1, CHANNEL0, DIMM0
Microprocessor 2, DIMM E2	CPU1, CHANNEL0, DIMM1
Microprocessor 2, DIMM F1	CPU1, CHANNEL1, DIMM0
Microprocessor 2, DIMM F2	CPU1, CHANNEL1, DIMM1
Microprocessor 2, DIMM G1	CPU1, CHANNEL2, DIMM0
Microprocessor 2, DIMM G2	CPU1, CHANNEL2, DIMM1
Microprocessor 2, DIMM H1	CPU1, CHANNEL3, DIMM0
Microprocessor 2, DIMM H2	CPU1, CHANNEL3, DIMM1