Independent mode
In independent memory mode, memory channels can be populated with DIMMs in any order and you can populate all channels for each processor in any order with no matching requirements. Independent memory mode provides the highest level of memory performance, but lacks failover protection. The DIMM installation order for independent memory mode varies based on the number of processors and memory modules installed in the server.
All memory modules to be installed must be of the same type. x4 and x8 DIMMs can be mixed in the same channel.
Memory modules from different vendors are supported.
There must be at least one DDR4 DIMM per socket.
In each memory channel, populate slot 0 first.
If a memory channel has two DIMMs, populate the DIMM with a higher number of ranks in slot 0; if the two DIMMs have the same number of ranks, populate the DIMM with a higher capacity in slot 0.
A maximum of 8 logical ranks (ranks seen by the host) per channel is allowed.
- A maximum of two different DIMM capacities are supported per system.
For channels A, C, E, and G, populated DIMMs must have the same total capacity for each channel.
For channels B, D, F, and H, populated DIMMs must have the same total capacity for each channel, which can be different from that of the other set (channels A, C, E, and G).
If there are more than two DIMMs, populate them in a right-and-left symmetrical manner across a CPU socket.
With one processor
The following table shows the sequence of populating memory modules (with the same capacity) for independent mode when only one processor is installed.
Total DIMMs | CPU 1 | ||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | ||
1 DIMM | 3 | ||||||||||||||||
2 DIMMs | 3 | 7 | |||||||||||||||
4 DIMMs1 | 3 | 7 | 10 | 14 | |||||||||||||
6 DIMMs | 1 | 3 | 7 | 10 | 14 | 16 | |||||||||||
8 DIMMs1, 2 | 1 | 3 | 5 | 7 | 10 | 12 | 14 | 16 | |||||||||
12 DIMMs | 1 | 2 | 3 | 4 | 7 | 8 | 9 | 10 | 13 | 14 | 15 | 16 | |||||
16 DIMMs1, 2 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 |
DIMM configurations that support the Sub NUMA Clustering (SNC) feature, which can be enabled via UEFI. SNC is not supported if DIMM population does not follow the sequence indicated by the table above.
DIMM configurations that support Software Guard Extensions (SGX). See Enable Software Guard Extensions (SGX) to enable this feature.
The following table shows the sequence of populating memory modules (with different capacities) for independent mode when only one processor is installed.
Total DIMMs | CPU 1 | ||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | ||
2 DIMM | 3 | 5 | |||||||||||||||
4 DIMMs | 3 | 5 | 12 | 14 | |||||||||||||
8 DIMMs1, 2 | 1 | 3 | 5 | 7 | 10 | 12 | 14 | 16 | |||||||||
12 DIMMs1, 2 | 1 | 3 | 4 | 5 | 7 | 8 | 9 | 10 | 12 | 13 | 14 | 16 | |||||
16 DIMMs1, 2 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 |
DIMM configurations that support the Sub NUMA Clustering (SNC) feature, which can be enabled via UEFI. SNC is not supported if DIMM population does not follow the sequence indicated by the table above.
DIMM configurations that support Software Guard Extensions (SGX). See Enable Software Guard Extensions (SGX) to enable this feature.
With two processors
The following table shows the sequence of populating memory modules (with the same capacity) for independent mode when two processors are installed.
Total DIMMs | CPU 1 | ||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | ||
2 DIMMs | 3 | ||||||||||||||||
4 DIMMs | 3 | 7 | |||||||||||||||
8 DIMMs1 | 3 | 7 | 10 | 14 | |||||||||||||
12 DIMMs | 1 | 3 | 7 | 10 | 14 | 16 | |||||||||||
16 DIMMs1, 2 | 1 | 3 | 5 | 7 | 10 | 12 | 14 | 16 | |||||||||
24 DIMMs | 1 | 2 | 3 | 4 | 7 | 8 | 9 | 10 | 13 | 14 | 15 | 16 | |||||
32 DIMMs1, 2 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | |
Total DIMMs | CPU 2 | ||||||||||||||||
17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | ||
2 DIMMs | 19 | ||||||||||||||||
4 DIMMs | 19 | 23 | |||||||||||||||
8 DIMMs1 | 19 | 23 | 26 | 30 | |||||||||||||
12 DIMMs | 17 | 19 | 23 | 26 | 30 | 32 | |||||||||||
16 DIMMs1, 2 | 17 | 19 | 21 | 23 | 26 | 28 | 30 | 32 | |||||||||
24 DIMMs | 17 | 18 | 19 | 20 | 23 | 24 | 25 | 26 | 29 | 30 | 31 | 32 | |||||
32 DIMMs1, 2 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 |
DIMM configurations that support the Sub NUMA Clustering (SNC) feature, which can be enabled via UEFI. SNC is not supported if DIMM population does not follow the sequence indicated by the table above.
DIMM configurations that support Software Guard Extensions (SGX). See Enable Software Guard Extensions (SGX) to enable this feature.
The following table shows the sequence of populating memory modules (with the different capacities) for independent mode when two processors are installed.
Total DIMMs | CPU 1 | ||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | ||
4 DIMMs | 3 | 5 | |||||||||||||||
8 DIMMs | 3 | 5 | 12 | 14 | |||||||||||||
16 DIMMs1, 2 | 1 | 3 | 5 | 7 | 10 | 12 | 14 | 16 | |||||||||
24 DIMMs1, 2 | 1 | 3 | 4 | 5 | 7 | 8 | 9 | 10 | 12 | 13 | 14 | 16 | |||||
32 DIMMs1, 2 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | |
Total DIMMs | CPU 2 | ||||||||||||||||
17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | ||
4 DIMMs | 19 | 21 | |||||||||||||||
8 DIMMs | 19 | 21 | 28 | 30 | |||||||||||||
16 DIMMs1, 2 | 17 | 19 | 21 | 23 | 26 | 28 | 30 | 32 | |||||||||
24 DIMMs1, 2 | 17 | 19 | 20 | 21 | 23 | 24 | 25 | 26 | 28 | 29 | 30 | 32 | |||||
32 DIMMs1, 2 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 |
DIMM configurations that support the Sub NUMA Clustering (SNC) feature, which can be enabled via UEFI. SNC is not supported if DIMM population does not follow the sequence indicated by the table above.
DIMM configurations that support Software Guard Extensions (SGX). See Enable Software Guard Extensions (SGX) to enable this feature.