DCPMM Installation order: App Direct mode with two processors
When implementing App Direct Mode, any supported DIMMs in any capacity can be installed.
When two processors are installed in the server:
Processors 1 and 2 are installed in the lower system board of the lower compute tray.
Several configurations are supported with implementing App Direct mode with eight processors:
6 DCPMMs/6 DRAM DIMMs per processor
4 DCPMMs/6 DRAM DIMMs per processor
2 DCPMMs/8 DRAM DIMMs per processor
2 DCPMMs/6 DRAM DIMMs per processor
2 DCPMMs/4 DRAM DIMMs per processor
1 DCPMM/6 DRAM DIMMs per processor
1 DCPMM in the system
6 DCPMMs/6 DRAM DIMMs per processor
Processor 1 | Processor 2 | |||||||||||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | |||
D | P | D | P | D | P | P | D | P | D | P | D | D | P | D | P | D | P | P | D | P | D | P | D |
4 DCPMMs/6 DRAM DIMMs per processor
Processor 1 | Processor 2 | |||||||||||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | |||
D | D | P | D | P | P | D | P | D | D | D | D | P | D | P | P | D | P | D | D |
2 DCPMMs/ 8 DRAM DIMMs per processor
Processor 1 | Processor 2 | |||||||||||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | |||
P | D | D | D | D | D | D | D | D | P | P | D | D | D | D | D | D | D | D | P |
2 DCPMMs/6 DRAM DIMMs per processor
Processor 1 | Processor 2 | |||||||||||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | |||
D | D | D | P | P | D | D | D | D | D | D | P | P | D | D | D |
2 DCPMMs/4 DRAM DIMMs per processor
Processor 1 | Processor 2 | |||||||||||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | |||
P | D | D | D | D | P | P | D | D | D | D | P |
1 DCPMM/6 DRAM DIMMs per processor
Processor 1 | Processor 2 | |||||||||||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | |||
D | D | D | P | D | D | D | D | D | D | P | D | D | D |
1 DCPMM in the system
Processor 1 | Processor 2 | |||||||||||||||||||||||||
1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | |||
D | D | D | P | D | D | D | D | D | D | D | D | D |
Give documentation feedback