DRAM DIMMs installation order for Intel® Xeon® CPU Max processor
This section contains information of how to install DRAM DIMMs properly when the system is installed with Intel® Xeon® CPU Max processors.
Intel® Xeon® CPU Max operating systems support
Intel® Xeon® CPU Max requires specific version of supported operating systems. Make sure the operating system in the server is updated to designated version for proper Intel® Xeon® CPU Max implementation. For OS deployment instructions, see Deploy the operating system.
| Operating system | version |
|---|---|
| RHEL | 8.6 and 9.0 RHEL Version 8 specifically does not include the driver automatically using Flat mode. It is still possible to use Flat mode, it just needs to be explicitly enabled by user in the kernel parameters. |
| SLES | 15 SP4 |
Memory modes for Intel® Xeon® CPU Max processors and High Bandwidth Memory (HBM)
HBM-only mode
In HBM-only mode, there is no DRAM DIMM installed in the system, and the only memory available is HBM.
For DRAM DIMM installation order, see HBM-only mode memory population sequence.
Flat mode
In Flat mode, DRAM DIMMs and HBM are both installed in the system. The system view both of them as memory.For DRAM DIMM installation order, see Flat mode memory population sequence.
Cache mode
In Cache mode, DRAM DIMMs and HBM are both installed in the system. The system view DRAM DIMMs as memory and HBM as cache for DRAM DIMMs.
DRAM memory to HBM ratio must be in 2:1 and up to 64:1 ratio for each processor. Each Intel® Xeon® CPU Max processor contains 64 GB High Bandwidth Memory.
For DRAM DIMM installation order, see DRAM DIMMs installation order.
SD650 V3 supports fully populated processors only (two processors per node).
Mixing DIMMs with different capacity is not allowed. All DIMMs installed must be identical.
Memory modes can be set up in UEFI
HBM-only mode memory population sequence
| Processor 1 | Processor 2 | |||||||||||||||
| iMC | iMC1 | iMC0 | iMC2 | iMC3 | iMC3 | iMC2 | iMC0 | iMC1 | ||||||||
| Memory channel | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 |
| DIMM slot number | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 |
| 0 DIMMs | F | F | F | F | F | F | F | F | F | F | F | F | F | F | F | F |
Flat mode memory population sequence
| Processor 1 | Processor 2 | |||||||||||||||
| iMC | iMC1 | iMC0 | iMC2 | iMC3 | iMC3 | iMC2 | iMC0 | iMC1 | ||||||||
| Memory channel | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 |
| DIMM slot number | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 |
| 2 DIMMs | F | F | F | D | F | F | F | F | F | F | F | F | D | F | F | F |
| 4 DIMMs | F | F | F | D | F | F | D | F | F | D | F | F | D | F | F | F |
| 8 DIMMs | F | D | F | D | D | F | D | F | F | D | F | D | D | F | D | F |
| 16 DIMMs | D | D | D | D | D | D | D | D | D | D | D | D | D | D | D | D |
Cache mode memory population sequence
| Processor 1 | Processor 2 | |||||||||||||||
| iMC | iMC1 | iMC0 | iMC2 | iMC3 | iMC3 | iMC2 | iMC0 | iMC1 | ||||||||
| Memory channel | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 |
| DIMM slot number | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 |
| 8 DIMMs Supports 32 GB, 64 GB, and 128 GB DIMM. | F | D | F | D | D | F | D | F | F | D | F | D | D | F | D | F |
| 16 DIMMs Supports 16 GB, 32 GB, 64 GB, and 128 GB DIMM. | D | D | D | D | D | D | D | D | D | D | D | D | D | D | D | D |