Memory mirroring mode
Memory-mirroring mode provides full memory redundancy while reducing the total system memory capacity in half. Memory channels are grouped in pairs with each channel receiving the same data. If a failure occurs, the memory controller switches from the DIMMs on the primary channel to the DIMMs on the backup channel. The DIMM installation order for memory mirroring varies based on the number of processors and DIMMs installed in the server.
Mirroring can be configured across two channels within M2M/iMC complex.
The total DDR5 memory size of the primary and secondary channels must be the same.
9x4 RDIMMs (Value RDIMM) do not support mirroring mode
Each DIMM must be identical in size and architecture.
DIMMs on each memory channel must be of equal density.
If two memory channels have DIMMs, mirroring occurs across two DIMMs (channels 0/1 will both contain the primary/secondary memory caches).
If three memory channels have DIMMs, mirroring occurs across all three DIMMs (channels 0/1, channels 1/2, and channels 2/0 will all contain primary/secondary memory caches).
Partial Memory Mirroring is a sub-function of memory mirroring. It requires following the memory installation order of memory mirroring mode.
| Channels | Channel 0 | Channel 1 | ||
|---|---|---|---|---|
| Slots | Slot 1 | Slot 0 | Slot 1 | Slot 0 |
| Identical DDR5 DIMM installation required | Y | Y | ||
| Identical DDR5 DIMM installation required for full channel mirroring | Y | Y | Y | Y |
Mirror memory mode with one processor
| Total DIMMs | Processor 1 | Total DIMMs | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | |||
| 81 | 1 | 3 | 5 | 7 | 10 | 12 | 14 | 16 | 8* | |||||||||
| 161 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 16* | |
Sub NUMA Clustering (SNC2) feature can only be enabled when DIMMs are populated in this specified sequence. The SNC2 feature can be enabled via UEFI.
Mirror memory mode with two processors
| Total DIMMs | Processor 1 | Total DIMMs | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | |||
| 161 | 1 | 3 | 5 | 7 | 10 | 12 | 14 | 16 | 16* | |||||||||
| 321 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 32* | |
| Total DIMMs | Processor 2 | Total DIMMs | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 32 | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | |||
| 161 | 32 | 30 | 28 | 26 | 23 | 21 | 19 | 17 | 16* | |||||||||
| 321 | 32 | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 32* | |
Sub NUMA Clustering (SNC2) feature can only be enabled when DIMMs are populated in this specified sequence. The SNC2 feature can be enabled via UEFI.