Installation order: memory sparing with four processors

There are two sections for memory sparing mode with four processors:

Memory sparing with four processors for single rank (1R) memory

The following tables show the DIMM population sequence for memory sparing when four processors are installed.

Note

When adding one or more DIMMs during a memory upgrade, you might need to move other DIMMs that are already installed to new locations.

Table 1. Memory sparing with four processors for single rank (1R) memory (Processors 1 and 2, 8 to 48 total DIMMs installed in compute node)
Total	Processor 1												Processor 2												Total
DIMMs	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16	17	18	19	20	21	22	23	24	DIMMs
8					5	6											17	18							8
16					5	6	7	8									17	18	19	20					16
24			3	4	5	6	7	8							15	16	17	18	19	20					24
32			3	4	5	6	7	8	9	10					15	16	17	18	19	20	21	22			32
40	1	2	3	4	5	6	7	8	9	10			13	14	15	16	17	18	19	20	21	22			40
48	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16	17	18	19	20	21	22	23	24	48

To continue populating processor 3 and 4 DIMMs for a system with 8 to 48 DIMMs, see Table 2.

Table 2. Memory sparing with four processors for single rank (1R) memory (Processors 1 and 2, 8 to 48 total DIMMs installed in compute node)
Total	Processor 3												Processor 4												Total
DIMMs	25	26	27	28	29	30	31	32	33	34	35	36	37	38	39	40	41	42	43	44	45	46	47	48	DIMMs
8							31	32											43	44					8
16					29	30	31	32									41	42	43	44					16
24					29	30	31	32	33	34							41	42	43	44	45	46			24
32			27	28	29	30	31	32	33	34					39	40	41	42	43	44	45	46			32
40			27	28	29	30	31	32	33	34	35	36			39	40	41	42	43	44	45	46	47	48	40
48	25	26	27	28	29	30	31	32	33	34	35	36	37	38	39	40	41	42	43	44	45	46	47	48	48

For processor 1 and 2 DIMM population sequences for systems with 8 to 48 DIMMs installed in compute node, see Table 1.

Table 3. Memory sparing with four processors for dual (2R) or higher rank memory (Processors 1 and 2, 4 to 48 total DIMMs installed in compute node)
Total	Processor 1												Processor 2												Total
DIMMs	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16	17	18	19	20	21	22	23	24	DIMMs
4					5												17								4
8					5			8									17			20					8
12			3		5			8							15		17			20					12
16			3		5			8		10					15		17			20		22			16
20	1		3		5			8		10			13		15		17			20		22			20
24	1		3		5			8		10		12	13		15		17			20		22		24	24
28			3	4	5	6		8		10		12			15	16	17	18		20		22		24	28
32			3	4	5	6	7	8	9	10					15	16	17	18	19	20	21	22			32
36	1	2	3	4	5	6		8		10		12	13	14	15	16	17	18		20		22		24	36
40	1	2	3	4	5	6	7	8	9	10			13	14	15	16	17	18	19	20	21	22			40
44	1	2	3	4	5	6	7	8	9	10		12	13	14	15	16	17	18	19	20	21	22		24	44
48	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16	17	18	19	20	21	22	23	24	48

To continue populating processor 3 and 4 DIMMs for a system with 4 to 48 DIMMs, see Table 4.

Table 4. Independent mode with four processors (Processors 3 and 4, 4 to 48 total DIMMs installed in compute node)
Total	Processor 3												Processor 4												Total
DIMMs	25	26	27	28	29	30	31	32	33	34	35	36	37	38	39	40	41	42	43	44	45	46	47	48	DIMMs
4								32												44					4
8					29			32									41			44					8
12					29			32		34							41			44		46			12
16			27		29			32		34					39		41			44		46			16
20			27		29			32		34		36			39		41			44		46		48	20
24	25		27		29			32		34		36	37		39		41			44		46		48	24
28	25		27		29		31	32	33	34			37		39		41		43	44	45	46			28
32			27	28	29	30	31	32	33	34					39	40	41	42	43	44	45	46			32
36	25		27		29		31	32	33	34	35	36	37		39		41		43	44	45	46	47	48	36
40			27	28	29	30	31	32	33	34	35	36			39	40	41	42	43	44	45	46	47	48	40
44	25		27	28	29	30	31	32	33	34	35	36	37		39	40	41	42	43	44	45	46	47	48	44
48	25	26	27	28	29	30	31	32	33	34	35	36	37	38	39	40	41	42	43	44	45	46	47	48	48

For processor 1 and 2 DIMM population sequences for systems with 4 to 48 DIMMs installed in compute node, see Table 3.